Detector 3
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Revision as of 19:44, 11 May 2016
This page contains information about changes/issues for RHESSI detector 3 after the 2014 anneal. Detector updates from 2012-mid 2014 can be found here: Detector 3 anneal 2012
Contents |
Post 2014 Anneal
Detector 3 is SEGMENTED following the 2014 anneal (yay!)
- 2014-Aug-26: D3 is suffering a lot from the known light leak problem. This does not affect the quality of the data but greatly reduces livetime at times when light leaks in through the cryostat port. To alleviate this problem, the G3 rear fast threshold was raised from 0x45 to 0x50 at 2014-238-19:22:56 UTC. This didn't seem to fix the problem.
- Another threshold change b/c of light leak:
14-241-18:34:11 /IDPUTABLE3 REARFASTDAC ;Load address 0x25CC 14-241-18:34:31 /IDPULOAD VALUE=0x60 ;Rear fast from ox50 to 0x60
- Front Fast threshold increase due to light leak. This lowered fast counts and increased livetime
2015-152-16:58:07 /IDPUTABLE3 OFFSET=FRONTFASTDAC 2015-152-16:58:16 /IDPLOAD VALUE=0x30 ; was 0x22
- The front fast threshold was increased on July 10 2015 due to low livetime due to high fast rates. This action was effective in raising the livetime.
2015-191-19:20:47 /IDPUTABLE3 OFFSET=FRONTFASTDAC 2015-191-19:20:58 /IDPLOAD VALUE=0x40 ; was 0x30
- On Aug 20, 2015 the front fast threshold was raised in order to lower fast rates and free up livetime. This was successful: Livetime rose from ~50% to >90%.
15-232-22:16:08 start idib_chg_thrshld (3, FRONT, FAST, 0x50) 15-232-22:16:30 /IDPUDUMPTABL TABLE=DIBTBL3 15-232-22:16:30 /IDPUTABLE3 OFFSET=FRONTFASTDAC 15-232-22:16:41 /IDPLOAD VALUE=0x50
- By Aug 24, 2015 rear livetime was so low that the detector had entered "reverse mode" where fast rates are not fully shown, and so fast threshold changes give the opposite effect to that you might expect. (Light leak shows up as livetime peaks, not valleys, in this mode.) The rear fast threshold was raised in two jumps. The first raise apparently increased fast rates and worsened livetime (due to this "reverse mode") but the second raise was successful in bringing down the fast rates and restoring livetime to ~64%.
2015-236-20:45:42 /IDPUTABLE3 OFFSET=REARFASTDAC 2015-236-20:45:54 /IDPLOAD VALUE=0x80 ; was 0x70
2015-237-00:03:38 /IDPUTABLE3 OFFSET=REARFASTDAC 2015-237-00:03:48 /IDPLOAD VALUE=0x90 ; was 0x80
- The front slow count rates were elevated, to try to bring them down we raised the slow front threshold by 0x10 on August 27th. This has an immediate effect lowering the slow front counts by a factor of 2. We also raised the front and rear fast threshold to increase the livetime.
2015-239-17:57:41 /IDPUTABLE3 OFFSET=FRONTSLOWDAC 2015-239-17:57:50 /IDPLOAD VALUE=0x1C ; was 0x0C
2015-239-19:33:13 /IDPUTABLE3 OFFSET=REARFASTDAC 2015-239-19:33:23 /IDPLOAD VALUE=0xA0 ; was 0x90
2015-239-21:13:25 /IDPUTABLE3 OFFSET=FRONTFASTDAC 2015-239-21:13:33 /IDPLOAD VALUE=0x60 ; was 0x50
- On Sept 14 2015, we raised the rear fast threshold on D3 from 0xA0 to 0xB0, to arrest a live-time decrease. Live time jumped fro 10 to 70%, but was bak to 40% in two days.
2015-257-17:33:14 /IDPUTABLE3 OFFSET=REARFASTDAC 2015-257-17:33:22 /IDPLOAD VALUE=0xB0 ; was 0xA0
- Some threshold changes occurred during the tohban week of Sept 15-22.
- On Sept 23, it was decided that the last changes to the slow threshold were probably too drastic, especially considering that the fast threshold was changed at the same time. We backed the front slow threshold back down to 0x1C, which is what it had been before the last adjustment. This needs to be monitored to see how D3 operates in this state, and keep an eye on the slow rates + SSR. UPDATE Sept. 24: the D3 event rate did not significantly change with this threshold drop. Livetime is still ~90% (same as before the drop) so I think this is a stable, working condition. If more livetime is desired, the fast threshold could be raised again.
2015-266-19:24:00 /IDPUTABLE3 OFFSET=FRONTSLOWDAC 2015-266-19:24:12 /IDPLOAD VALUE=0x1C ;was 0x80
- 2nd October 2015: We returned detector G3 Front Slow threshold to the nominal value of 0x0C (was 0x1C). When we did this, the front slow valids jumped from ~1680 cps to ~3800 cps. We left it this way, over the weekend, but keept a close eye on it.
15-276-01:48:22 start idib_chg_thrshld(3, FRONT, SLOW, 0x0C) ; was 0x1C 15-276-01:48:26 /IDPUDUMPTABL TABLE=DIBTBL3 15-276-01:48:26 /IDPUTABLE3 OFFSET=FRONTSLOWDAC 15-276-01:48:37 /IDPLOAD VALUE=0x0C
- 5th October 2015: We increased the front slow thresholds, on detectors G3 and G6.
15-278-21:28:51 start idib_chg_thrshld(3, FRONT, SLOW, 0x15) ; was 0x0C 15-278-21:28:55 /IDPUDUMPTABL TABLE=DIBTBL3 15-278-21:28:55 /IDPUTABLE3 OFFSET=FRONTSLOWDAC 15-278-21:29:13 /IDPLOAD VALUE=0x15
- On October 7, Detector 3's front fast threshold was increased from 0x80 to 0xD0 at 280-22:13:38 UTC. This was due to high fast rates and low livetime in that detector. This worked, increasing D3 front LT to ~85%.
2015-280-22:13:30 /IDPUTABLE3 OFFSET=FRONTFASTDAC 2015-280-22:13:38 /IDPLOAD VALUE=0xD0 ; was 0x80
- On October 8 and 9, the rear fast threshold was raised to try and raise livetime. This threshold is now maxed out, but it wasn't enough to lower the fast rates enough to get appreciable LT back. The rear segment is at essentially zero livetime, so it's not really functional.
2015-281-21:56:47 /IDPUTABLE3 OFFSET=REARFASTDAC 2015-281-21:57:12 /IDPLOAD VALUE=0xE0 ; was 0xD0
2015-282-19:56:09 /IDPUTABLE3 OFFSET=REARFASTDAC 2015-282-19:56:18 /IDPLOAD VALUE=0xF0 ; was 0xE0
2015-282-23:02:27 /IDPUTABLE3 OFFSET=REARFASTDAC 2015-282-23:02:35 /IDPLOAD VALUE=0xFF ; was 0xF0
- On October 28 in an attempt to lower the high reset rates and the front slow counts registered the HV on the detector was changed to ~3799.
2015-301-20:28:06 /ihvdac detector=3, voltage=196
- On November 8 and 9 the front fast threshold was raised to 0xE0 and then 0xF0, with each increase live time was raised to 70%, only to drop dramatically.
2015-312-06:17:30 /IDPUTABLE3 OFFSET=FRONTFASTDAC 2015-312-06:17:43 /IDPLOAD VALUE=0xE0 ; was 0xD0
2015-313-19:25:25 /IDPUTABLE3 OFFSET=FRONTFASTDAC 2015-313-19:25:33 /IDPLOAD VALUE=0xF0 ; was 0xE0
- November 14, HV dropped to 3044V
2015-318-07:01:15 /ihvdac detector=3, voltage=157
- November 15, front fast threshold raised...
2015-319-04:59:14 /IDPUTABLE3 OFFSET=FRONTFASTDAC 2015-319-04:59:22 /IDPLOAD VALUE=0xFF ; was 0xF0
- November 22, HV dropped by 800 V due to a rapid decrease of the livetime
2015-326-03:44:34 /ihvdac detector=3, voltage=117 ; (2254V)
- November 25, Front slow threshold raised to 0x30
2015-329-21:24:25 /IDPUTABLE3 OFFSET=FRONTSLOWDAC 2015-329-21:24:36 /IDPLOAD VALUE=0x30 ; was 0x15
- November 29, Multiple HV decreases and a front slow threshold raise to 0xC0:
2015-334-22:24:52 /ihvdac detector=3, voltage=107 2015-334-22:25:51 /ihvdac detector=3, voltage=97 2015-334-22:26:32 /ihvdac detector=3, voltage=87 2015-334-22:27:21 /ihvdac detector=3, voltage=77 (1470 V)
2015-334-22:28:41 /IDPUTABLE3 OFFSET=FRONTSLOWDAC 2015-334-22:28:50 /IDPLOAD VALUE=0xC0 ; was 0x50
- December 1, 2015, HV decrease of 200 V
2015-335-23:39:53 /ihvdac detector=3, voltage=67 ; (1274.5 V)
- 2015 December 10, power-cycling: D3's HV was ramped to 0.0 v and the Detector Interface Board #3 was powered off for one orbit. The detector segmented once a few tens of volts were applied. We ramped it back up to 1000 V by the end of the pass. The front livetime returned to ~78%, about the same as before the power cycle. If this power-cycling improved the detector status, we wanted to lower front slow threshold from 0xC0 to 0xB0 in order to better support GRIPS (0xC0 is 35 keV). However, D3 spectrum showed no change after this power-cycling. So, no threshold change was made.
2015-344-16:42:42 /IHVDAC DETECTOR=3, VOLTAGE=0 (0 V) 2015-344-16:44:30 start idib_single_off(3)
2015-344-18:18:23 start idib_single_on(3) 2015-344-18:18:50 /ihvdac detector=3, voltage=10 (173 V) 2015-344-18:19:46 /ihvdac detector=3, voltage=53 (1000 V)
- On 28 December 2015, detector 3 events were turned off; too much noise
2015-362-06:05:36 /itmoff value=dib3 ; Turn off event collection for G3
2015-362-06:05:42 start sc_tbl_loadpkt ("T15357SLTN61_No_G3_G4_G9.00") ; New RTS 26 so G3 events will stay off
Post 2016 Anneal
Detector 3 is SEGMENTED following the 2016 anneal
D3 front slow LLD threshold history
| post 2014 anneal | 0x0C |
| 2015-08-27 17:57:50 UTC | 0x1C (was 0x0C) |
| 2015-09-17 06:35:17 UTC | 0x80 (was 0x1C) |
| 2015-09-23 19:24:12 UTC | 0x1C (was 0x80) |
| 2015-10-03 01:48:22 UTC | 0x0C (was 0x1C) |
| 2015-10-05 21:28:51 UTC | 0x15 (was 0x0C) |
| 2015-11-25 21:24:36 UTC | 0x30 (was 0x15) |
| 2015-11-29 22:28:50 UTC | 0xC0 (was 0x50) |
| post 2016 anneal | 0x0C |
D3 front fast LLD threshold history
| post 2014 anneal | 0x22 |
| 2015-06-03 16:58:16 UTC | 0x30 (was 0x22) |
| 2015-07-09 19:20:58 UTC | 0x40 (was 0x30) |
| 2015-08-20 22:16:41 UTC | 0x50 (was 0x40) |
| 2015-08-27 21:13:33 UTC | 0x60 (was 0x50) |
| 2015-09-17 06:36:45 UTC | 0x70 (was 0x60) |
| 2015-09-22 19:47:12 UTC | 0x80 (was 0x70) |
| 2015-10-07 22:13:38 UTC | 0xD0 (was 0x80) |
| 2015-11-08 06:17:43 UTC | 0xE0 (was 0xD0) |
| 2015-11-09 19:25:33 UTC | 0xF0 (was 0xE0) |
| 2015-11-15 04:59:22 UTC | 0xFF (was 0xF0) |
| post 2016 anneal | 0x22 |
D3 rear slow LLD threshold history
| post 2014 anneal | 0x30 |
| post 2016 anneal | 0x30 |
D3 rear fast LLD threshold history
| post 2014 anneal | 0x45 |
| 2014-08-26 19:22:56 UTC | 0x50 (was 0x45) |
| 2014-08-29 18:33:28 UTC | 0x60 (was 0x50) |
| 2015-08-24 20:45:54 UTC | 0x80 (was 0x70) |
| 2015-08-25 00:03:48 UTC | 0x90 (was 0x80) |
| 2015-08-27 19:33:23 UTC | 0xA0 (was 0x90) |
| 2015-09-14 17:33:22 UTC | 0xB0 (was 0xA0) |
| 2015-09-17 06:37:06 UTC | 0xC0 (was 0xB0) |
| 2015-09-21 20:09:44 UTC | 0xD0 (was 0xC0) |
| 2015-10-08 21:57:12 UTC | 0xE0 (was 0xD0) |
| 2015-10-08 19:56:18 UTC | 0xF0 (was 0xE0) |
| 2015-10-08 23:02:35 UTC | 0xFF (was 0xF0) |
| post 2016 anneal | 0x60 |
D3 HV history
| post 2014 anneal | 3995 V | |
| 2015-10-28 20:28:06 UTC | 3799 V (was 3995 V) | |
| 2015-11-14 07:01:15 UTC | 3044 V (was 3799 V) | |
| 2015-11-22 03:44:34 UTC | 2255 V (was 3044 V) | |
| 2015-11-29 22:27:21 UTC | 1470 V (was 2255 V) | |
| 2015-12-01 23:39:53 UTC | 1274 V (was 1470 V) | |
| 2015-12-17 18:45:22 UTC | 500 V | |
| post 2016 anneal | 3995 V |
