Detector 3

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(D3 front slow LLD threshold history)
(D3 front slow LLD threshold history)
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| 2016-10-10 22:33:14 || 0x0C (Was 0x30)
| 2016-10-10 22:33:14 || 0x0C (Was 0x30)
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| 2017-08-07 20:59:20 || 0x30 (Was 0x15) ?!?! (Latest DIB table agrees with this...)
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| 2017-08-07 20:59:20 || 0x30 (Was 0x15) ?!?! (Ops agrees with this...)
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| 2017-08-07 21:00:39 || 0x15 (Was 0x30)
| 2017-08-07 21:00:39 || 0x15 (Was 0x30)

Revision as of 18:09, 9 August 2017

This page contains information about changes/issues for RHESSI detector 3 after the 2014 anneal. Detector updates from 2012-mid 2014 can be found here: Detector 3 anneal 2012

Contents

Post 2014 Anneal

Detector 3 is SEGMENTED following the 2014 anneal (yay!)

 14-241-18:34:11 /IDPUTABLE3 REARFASTDAC  ;Load address 0x25CC 
 14-241-18:34:31 /IDPULOAD VALUE=0x60     ;Rear fast from ox50 to 0x60

2015-152-16:58:07 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-152-16:58:16 /IDPLOAD VALUE=0x30  ; was 0x22
2015-191-19:20:47 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-191-19:20:58 /IDPLOAD VALUE=0x40  ; was 0x30
15-232-22:16:08 start idib_chg_thrshld (3, FRONT, FAST, 0x50)
15-232-22:16:30 /IDPUDUMPTABL TABLE=DIBTBL3
15-232-22:16:30 /IDPUTABLE3 OFFSET=FRONTFASTDAC
15-232-22:16:41 /IDPLOAD VALUE=0x50
2015-236-20:45:42 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-236-20:45:54 /IDPLOAD VALUE=0x80 ; was 0x70
2015-237-00:03:38 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-237-00:03:48 /IDPLOAD VALUE=0x90 ; was 0x80
2015-239-17:57:41 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
2015-239-17:57:50 /IDPLOAD VALUE=0x1C  ; was 0x0C
2015-239-19:33:13 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-239-19:33:23 /IDPLOAD VALUE=0xA0 ; was 0x90
2015-239-21:13:25 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-239-21:13:33 /IDPLOAD VALUE=0x60  ; was 0x50
2015-257-17:33:14 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-257-17:33:22 /IDPLOAD VALUE=0xB0 ; was 0xA0
2015-266-19:24:00 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
2015-266-19:24:12 /IDPLOAD VALUE=0x1C   ;was 0x80
15-276-01:48:22 start idib_chg_thrshld(3, FRONT, SLOW, 0x0C) ; was 0x1C
15-276-01:48:26 /IDPUDUMPTABL TABLE=DIBTBL3
15-276-01:48:26 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
15-276-01:48:37 /IDPLOAD VALUE=0x0C
15-278-21:28:51 start idib_chg_thrshld(3, FRONT, SLOW, 0x15)  ; was 0x0C
15-278-21:28:55 /IDPUDUMPTABL TABLE=DIBTBL3
15-278-21:28:55 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
15-278-21:29:13 /IDPLOAD VALUE=0x15
2015-280-22:13:30 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-280-22:13:38 /IDPLOAD VALUE=0xD0  ; was 0x80
2015-281-21:56:47 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-281-21:57:12 /IDPLOAD VALUE=0xE0 ; was 0xD0
2015-282-19:56:09 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-282-19:56:18 /IDPLOAD VALUE=0xF0 ; was 0xE0
2015-282-23:02:27 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-282-23:02:35 /IDPLOAD VALUE=0xFF ; was 0xF0
 2015-301-20:28:06 /ihvdac detector=3, voltage=196
2015-312-06:17:30 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-312-06:17:43 /IDPLOAD VALUE=0xE0  ; was 0xD0
2015-313-19:25:25 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-313-19:25:33 /IDPLOAD VALUE=0xF0  ; was 0xE0
2015-318-07:01:15 /ihvdac detector=3, voltage=157
2015-319-04:59:14 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-319-04:59:22 /IDPLOAD VALUE=0xFF  ; was 0xF0
2015-326-03:44:34 /ihvdac detector=3, voltage=117  ; (2254V)
2015-329-21:24:25 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
2015-329-21:24:36 /IDPLOAD VALUE=0x30  ; was 0x15
2015-334-22:24:52 /ihvdac detector=3, voltage=107
2015-334-22:25:51 /ihvdac detector=3, voltage=97
2015-334-22:26:32 /ihvdac detector=3, voltage=87
2015-334-22:27:21 /ihvdac detector=3, voltage=77 (1470 V)
2015-334-22:28:41 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
2015-334-22:28:50 /IDPLOAD VALUE=0xC0  ; was 0x50
2015-335-23:39:53 /ihvdac detector=3, voltage=67 ; (1274.5 V)
2015-344-16:42:42 /IHVDAC DETECTOR=3, VOLTAGE=0 (0 V)
2015-344-16:44:30 start idib_single_off(3)
2015-344-18:18:23 start idib_single_on(3)
2015-344-18:18:50 /ihvdac detector=3, voltage=10 (173 V)
2015-344-18:19:46 /ihvdac detector=3, voltage=53 (1000 V)

2015-362-06:05:36 /itmoff value=dib3  ; Turn off event collection for G3
2015-362-06:05:42 start sc_tbl_loadpkt ("T15357SLTN61_No_G3_G4_G9.00") ; New RTS 26 so G3 events will stay off

Post 2016 Anneal

Detector 3 is SEGMENTED following the 2016 anneal

16-145-16:16:43 start idib_chg_thrshld(3, FRONT, FAST, 0x30) 
16-145-16:16:47 /IDPUDUMPTABL TABLE=DIBTBL3
16-145-16:16:47 /IDPUTABLE3 OFFSET=FRONTFASTDAC
16-145-16:16:56 /IDPULOAD VALUE=0x30
16-145-16:17:19 start idib_chg_thrshld(3, REAR, FAST, 0x80)
16-145-16:17:23 /IDPUDUMPTABL TABLE=DIBTBL3
16-145-16:17:23 /IDPUTABLE3 OFFSET=REARFASTDAC
16-145-16:17:29 /IDPULOAD VALUE=0x80
16-228-19:35:20 start idib_chg_thrshld (3, FRONT, FAST, 0x38)
16-228-19:35:24 /IDPUDUMPTABL TABLE=DIBTBL3 
16-228-19:35:24 /IDPUTABLE3 OFFSET=FRONTFASTDAC
16-228-19:35:37 /IDPULOAD VALUE=0x38
16-228-22:50:35 start idib_chg_thrshld(3, FRONT, FAST, 0x40)
16-228-22:50:39 /IDPUDUMPTABL TABLE=DIBTBL3
16-228-22:50:39 /IDPUTABLE3 OFFSET=FRONTFASTDAC
16-228-22:50:53 /IDPULOAD VALUE=0x40

9-October-2016: Threshold changes due to noise from increased temperatures

16-283-19:41:46 start idib_chg_thrshld(3, FRONT, SLOW, 0x30)
16-283-19:41:49 /IDPUDUMPTABL TABLE=DIBTBL3
16-283-19:41:50 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
16-283-19:42:01 /IDPULOAD VALUE=0x30
16-283-19:42:24 start idib_chg_thrshld(3, FRONT, FAST, 0x60)
16-283-19:42:28 /IDPUDUMPTABL TABLE=DIBTBL3
16-283-19:42:28 /IDPUTABLE3 OFFSET=FRONTFASTDAC
16-283-19:42:37 /IDPULOAD VALUE=0x60
16-283-19:42:57 start idib_chg_thrshld(3, REAR, FAST, 0xA0)
16-283-19:43:01 /IDPUDUMPTABL TABLE=DIBTBL3
16-283-19:43:01 /IDPUTABLE3 OFFSET=REARFASTDAC
16-283-19:43:13 /IDPULOAD VALUE=0xA0

10-October-2016: Reverted Front Slow threshold changes, not much effect on live time

16-284-22:32:57 start idib_chg_thrshld(3, FRONT, SLOW, 0x0C)
16-284-22:33:01 /IDPUDUMPTABL TABLE=DIBTBL3
16-284-22:33:01 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
16-284-22:33:14 /IDPULOAD VALUE=0x0C

11-October-2016: Lowered HV to 3000 V for better front and rear livetimes

16-285-18:47:41 /ihvdac detector=3, voltage=0x9A

12-December-2016: Raised Rear Fast threshold for better front livetimes

16-347-16:52:42 /IDPULOAD VALUE=0xC0 ; was 0xB0
16-347-16:56:14 /IDPULOAD VALUE=0xD0 ; was 0xC0

D3 front slow LLD threshold history

post 2014 anneal 0x0C
2015-08-27 17:57:50 UTC 0x1C (was 0x0C)
2015-09-17 06:35:17 UTC 0x80 (was 0x1C)
2015-09-23 19:24:12 UTC 0x1C (was 0x80)
2015-10-03 01:48:22 UTC 0x0C (was 0x1C)
2015-10-05 21:28:51 UTC 0x15 (was 0x0C)
2015-11-25 21:24:36 UTC 0x30 (was 0x15)
2015-11-29 22:28:50 UTC 0xC0 (was 0x50)
post 2016 anneal 0x0C
2016-10-09 19:42:01 0x30 (Was 0x0C)
2016-10-10 22:33:14 0x0C (Was 0x30)
2017-08-07 20:59:20 0x30 (Was 0x15) ?!?! (Ops agrees with this...)
2017-08-07 21:00:39 0x15 (Was 0x30)

D3 front fast LLD threshold history

post 2014 anneal 0x22
2015-06-03 16:58:16 UTC 0x30 (was 0x22)
2015-07-09 19:20:58 UTC 0x40 (was 0x30)
2015-08-20 22:16:41 UTC 0x50 (was 0x40)
2015-08-27 21:13:33 UTC 0x60 (was 0x50)
2015-09-17 06:36:45 UTC 0x70 (was 0x60)
2015-09-22 19:47:12 UTC 0x80 (was 0x70)
2015-10-07 22:13:38 UTC 0xD0 (was 0x80)
2015-11-08 06:17:43 UTC 0xE0 (was 0xD0)
2015-11-09 19:25:33 UTC 0xF0 (was 0xE0)
2015-11-15 04:59:22 UTC 0xFF (was 0xF0)
post 2016 anneal 0x22
2016-05-24 16:16:43 UTC 0x30 (was 0x22)
2016-08-15 19:35:37 UTC 0x38 (was 0x30)
2016-08-15 22:50:35 UTC 0x40 (was 0x38)
2016-10-09 19:42:37 UTC 0x60 (was 0x40)
2016-12-17 23:13:54 UTC 0xA0 (was 0x80)
2016-12-18 17:48:48 UTC 0xB0 (was 0xA0)
2017-05-09 19:08:19 UTC 0xD0 (was 0xB0)
2017-08-07 19:19:40 UTC 0xFF (was 0xD0)
2017-08-07 19:20:44 UTC 0xD0 (was 0xFF)

D3 rear slow LLD threshold history

post 2014 anneal 0x30
post 2016 anneal 0x30

D3 rear fast LLD threshold history

post 2014 anneal 0x45
2014-08-26 19:22:56 UTC 0x50 (was 0x45)
2014-08-29 18:33:28 UTC 0x60 (was 0x50)
2015-08-24 20:45:54 UTC 0x80 (was 0x70)
2015-08-25 00:03:48 UTC 0x90 (was 0x80)
2015-08-27 19:33:23 UTC 0xA0 (was 0x90)
2015-09-14 17:33:22 UTC 0xB0 (was 0xA0)
2015-09-17 06:37:06 UTC 0xC0 (was 0xB0)
2015-09-21 20:09:44 UTC 0xD0 (was 0xC0)
2015-10-08 21:57:12 UTC 0xE0 (was 0xD0)
2015-10-08 19:56:18 UTC 0xF0 (was 0xE0)
2015-10-08 23:02:35 UTC 0xFF (was 0xF0)
post 2016 anneal 0x60
2016-05-24 16:17:19 UTC 0x80 (was 0x70)
2016-10-09 19:43:13 UTC 0xA0 (was 0x80)
2016-11-28 21:45:29 UTC 0xB0 (was 0xA0)
2016-12-12 16:52:42 UTC 0xC0 (was 0xB0)
2016-12-12 16:56:14 UTC 0xD0 (was 0xC0)
16-12-16 18:41:50 UTC 0xE0
16-12-16 20:20:55 UTC 0x70 (blooper)
16-12-16 23:39:13 UTC 0xE0 (blooper corrected)
2016-12-20 21:47:55 UTC 0xFF (was 0xE0)

D3 HV history

post 2014 anneal 3995 V
2015-10-28 20:28:06 UTC 3799 V (was 3995 V)
2015-11-14 07:01:15 UTC 3044 V (was 3799 V)
2015-11-22 03:44:34 UTC 2255 V (was 3044 V)
2015-11-29 22:27:21 UTC 1470 V (was 2255 V)
2015-12-01 23:39:53 UTC 1274 V (was 1470 V)
2015-12-17 18:45:22 UTC 500 V
post 2016 anneal 3995 V
2016-10-11 18:47:41 2990 V (was 3995 V)
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