Detector 3

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  15-278-21:29:13 /IDPLOAD VALUE=0x15
  15-278-21:29:13 /IDPLOAD VALUE=0x15
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* On October 7, Detector 3's fast threshold was increased from 0x80 to 0xD0 at 280-22:13:38 UTC.  This was due to high fast rates and low livetime in that detector.  Results should be checked, **in particular to see if this change was too drastic!**
+
* On October 7, Detector 3's front fast threshold was increased from 0x80 to 0xD0 at 280-22:13:38 UTC.  This was due to high fast rates and low livetime in that detector.  This worked, increasing D3 front LT to ~85%.
  2015-280-22:13:30 /IDPUTABLE3 OFFSET=FRONTFASTDAC
  2015-280-22:13:30 /IDPUTABLE3 OFFSET=FRONTFASTDAC
  2015-280-22:13:38 /IDPLOAD VALUE=0xD0  ; was 0x80
  2015-280-22:13:38 /IDPLOAD VALUE=0xD0  ; was 0x80
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* On October 8 and 9, the rear fast threshold was raised to try and raise livetime.  Results still need to be assessed.  This threshold is now maxed out.
+
* On October 8 and 9, the rear fast threshold was raised to try and raise livetime.  This threshold is now maxed out, but it wasn't enough to lower the fast rates enough to get appreciable LT back.  The rear segment is at essentially zero livetime, so it's not really functional.
  2015-281-21:56:47 /IDPUTABLE3 OFFSET=REARFASTDAC
  2015-281-21:56:47 /IDPUTABLE3 OFFSET=REARFASTDAC

Revision as of 18:12, 13 October 2015

This page contains information about changes/issues for RHESSI detector 3 after the 2014 anneal. Detector updates from 2012-mid 2014 can be found here: Detector 3 anneal 2012

Contents

Notes

Detector 3 is SEGMENTED following the 2014 anneal (yay!)

 14-241-18:34:11 /IDPUTABLE3 REARFASTDAC  ;Load address 0x25CC 
 14-241-18:34:31 /IDPULOAD VALUE=0x60     ;Rear fast from ox50 to 0x60

2015-152-16:58:07 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-152-16:58:16 /IDPLOAD VALUE=0x30  ; was 0x22
2015-191-19:20:47 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-191-19:20:58 /IDPLOAD VALUE=0x40  ; was 0x30
15-232-22:16:08 start idib_chg_thrshld (3, FRONT, FAST, 0x50)
15-232-22:16:30 /IDPUDUMPTABL TABLE=DIBTBL3
15-232-22:16:30 /IDPUTABLE3 OFFSET=FRONTFASTDAC
15-232-22:16:41 /IDPLOAD VALUE=0x50
2015-236-20:45:42 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-236-20:45:54 /IDPLOAD VALUE=0x80 ; was 0x70
2015-237-00:03:38 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-237-00:03:48 /IDPLOAD VALUE=0x90 ; was 0x80
2015-239-17:57:41 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
2015-239-17:57:50 /IDPLOAD VALUE=0x1C  ; was 0x0C
2015-239-19:33:13 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-239-19:33:23 /IDPLOAD VALUE=0xA0 ; was 0x90
2015-239-21:13:25 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-239-21:13:33 /IDPLOAD VALUE=0x60  ; was 0x50
2015-257-17:33:14 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-257-17:33:22 /IDPLOAD VALUE=0xB0 ; was 0xA0
2015-266-19:24:00 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
2015-266-19:24:12 /IDPLOAD VALUE=0x1C   ;was 0x80
15-276-01:48:22 start idib_chg_thrshld(3, FRONT, SLOW, 0x0C) ; was 0x1C
15-276-01:48:26 /IDPUDUMPTABL TABLE=DIBTBL3
15-276-01:48:26 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
15-276-01:48:37 /IDPLOAD VALUE=0x0C
15-278-21:28:51 start idib_chg_thrshld(3, FRONT, SLOW, 0x15)  ; was 0x0C
15-278-21:28:55 /IDPUDUMPTABL TABLE=DIBTBL3
15-278-21:28:55 /IDPUTABLE3 OFFSET=FRONTSLOWDAC
15-278-21:29:13 /IDPLOAD VALUE=0x15
2015-280-22:13:30 /IDPUTABLE3 OFFSET=FRONTFASTDAC
2015-280-22:13:38 /IDPLOAD VALUE=0xD0  ; was 0x80
2015-281-21:56:47 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-281-21:57:12 /IDPLOAD VALUE=0xE0 ; was 0xD0
2015-282-19:56:09 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-282-19:56:18 /IDPLOAD VALUE=0xF0 ; was 0xE0
2015-282-23:02:27 /IDPUTABLE3 OFFSET=REARFASTDAC
2015-282-23:02:35 /IDPLOAD VALUE=0xFF ; was 0xF0


D3 front slow LLD threshold history

post 2014 anneal 0x0C
2015-08-27 17:57:50 UTC 0x1C (was 0x0C)
2015-09-17 06:35:17 UTC 0x80 (was 0x1C)
2015-09-23 19:24:12 UTC 0x1C (was 0x80)
2015-10-03 01:48:22 UTC 0x0C (was 0x1C)
2015-10-05 21:28:51 UTC 0x15 (was 0x0C)

D3 front fast LLD threshold history

post 2014 anneal 0x22
2015-06-03 16:58:16 UTC 0x30 (was 0x22)
2015-07-09 19:20:58 UTC 0x40 (was 0x30)
2015-08-20 22:16:41 UTC 0x50 (was 0x40)
2015-08-27 21:13:33 UTC 0x60 (was 0x50)
2015-09-17 06:36:45 UTC 0x70 (was 0x60)
2015-09-22 19:47:12 UTC 0x80 (was 0x70)
2015-10-07 22:13:38 UTC 0xD0 (was 0x80)

D3 rear slow LLD threshold history

post 2014 anneal 0x30

D3 rear fast LLD threshold history

post 2014 anneal 0x45
2014-08-26 19:22:56 UTC 0x50 (was 0x45)
2014-08-29 18:33:28 UTC 0x60 (was 0x50)
2015-08-24 20:45:54 UTC 0x80 (was 0x70)
2015-08-25 00:03:48 UTC 0x90 (was 0x80)
2015-08-27 19:33:23 UTC 0xA0 (was 0x90)
2015-09-14 17:33:22 UTC 0xB0 (was 0xA0)
2015-09-17 06:37:06 UTC 0xC0 (was 0xB0)
2015-09-21 20:09:44 UTC 0xD0 (was 0xC0)
2015-10-08 21:57:12 UTC 0xE0 (was 0xD0)
2015-10-08 19:56:18 UTC 0xF0 (was 0xE0)
2015-10-08 23:02:35 UTC 0xFF (was 0xF0)


D3 HV history

post 2014 anneal 3995 V
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