Detector 7

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This page contains information about changes/issues for RHESSI detector 7 after the 2014 anneal.  Detector updates from 2012-mid 2014 can be found here: [[Detector 7 anneal 2012]]
This page contains information about changes/issues for RHESSI detector 7 after the 2014 anneal.  Detector updates from 2012-mid 2014 can be found here: [[Detector 7 anneal 2012]]
-
===Notes===
+
=== Post 2014 Anneal ===
After the 2014 anneal, detector 7 was unsegmented. As of 11-27-2014 it has SEGMENTED
After the 2014 anneal, detector 7 was unsegmented. As of 11-27-2014 it has SEGMENTED
Line 13: Line 13:
   G7 front slow to 0x0C (was 0x10) after 14:21 on 2015-Jan-07.
   G7 front slow to 0x0C (was 0x10) after 14:21 on 2015-Jan-07.
   G7 front fast to 0x22 (was 0x2E) after 14:22 on 2015-Jan-07.
   G7 front fast to 0x22 (was 0x2E) after 14:22 on 2015-Jan-07.
 +
 +
* On Jan 13 2015, we reverted the front slow thresh back to its previous value, because it was suspected that low-energy D7 events were filling up the SSR.
 +
  15-013-19:27:21 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
 +
  15-013-19:27:36 /IDPULOAD VALUE=0x10 ; increased from 0x0C
 +
  15-013-19:28:17 start idpu_dec_active_vigorous
 +
 +
* The rear fast threshold was changed on July 13 2015 due to dropping livetime in the rear:
 +
2015-194-16:35:07 /IDPUTABLE7 OFFSET=REARFASTDAC
 +
2015-194-16:35:15 /IDPLOAD VALUE=0x50 ; was 0x45
 +
 +
* The rear fast threshold was changed on July 24 2015 due to low livetime.  However, the change probably wasn't needed; the tohban hadn't noticed that a change had already been made a few days ago.  The next tohban can reverse the change if desired.
 +
2015-205-17:19:59 /IDPUTABLE7 OFFSET=REARFASTDAC
 +
2015-205-17:20:08 /IDPLOAD VALUE=0x70 ; was 0x60
 +
 +
* On August 27 D7 rear fast threshold was rasied to increase its livetime.
 +
 +
2015-239-17:58:24 /IDPUTABLE7 OFFSET=REARFASTDAC
 +
2015-239-17:58:32 /IDPLOAD VALUE=0x80 ; was 0x70
 +
 +
* On October 8, 9, and 12, the rear fast threshold was raised three times to try and raise livetime.  Results still need to be assessed.
 +
 +
2015-281-21:57:30 /IDPUTABLE7 OFFSET=REARFASTDAC
 +
2015-281-21:57:39 /IDPLOAD VALUE=0xB0 ; was 0xA0
 +
 +
2015-282-19:56:31 /IDPUTABLE7 OFFSET=REARFASTDAC
 +
2015-282-19:57:41 /IDPLOAD VALUE=0xC0 ; was 0xB0
 +
 +
2015-285-21:51:54 /IDPUTABLE7 OFFSET=REARFASTDAC
 +
2015-285-21:52:03 /IDPLOAD VALUE=0xD0 ; was 0xC0
 +
 +
* Also on October 12, the front fast threshold on D7 (and also D1) was raised.  This is to try and top off the livetime used in the attenuator logic.  It might not work, since the fast rates are not terribly high for this detector, in which case the change could be reversed by a future tohban.  Check this and see..
 +
 +
2015-285-21:50:47 /IDPUTABLE7 OFFSET=FRONTFASTDAC
 +
2015-285-21:50:56 /IDPLOAD VALUE=0x50  ; was 0x40
 +
 +
* On November 6 and 7, the rear fast threshold was raised twice to try and raise livetime. No luck.
 +
 +
2015-312-06:17:07 /IDPUTABLE7 OFFSET=REARFASTDAC
 +
2015-312-06:17:16 /IDPLOAD VALUE=0xF0 ; wax 0xE0
 +
 +
2015-313-19:22:31 /IDPUTABLE7 OFFSET=REARFASTDAC
 +
2015-313-19:22:41 /IDPLOAD VALUE=0xFF ; was 0xF0
 +
 +
* November 14, HV dropped by 200V to 3897V
 +
 +
2015-318-07:02:08 /ihvdac detector=7, voltage=201
 +
 +
* November 25, 2015, HV dropped to 3504V and front slow threshold raised to 0x30
 +
 +
2015-329-21:24:47 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
 +
2015-329-21:24:59 /IDPLOAD VALUE=0x30  ; was 0x10
 +
 +
2015-330-00:27:47 /ihvdac detector=7, voltage=181 (3504 V)
 +
 +
* 2015 December 10: front-slow threshold lowered
 +
 +
2015-344-21:38:17 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
 +
2015-344-21:38:33 /IDPLOAD VALUE=0x10  ; was 0x20
 +
 +
* 2015 December 12: HV lowered by 200 V in an attempt to reduce enhanced fast rates and livetime of D7 "REAR". The rear fast threshold is already at 0xFF. So this HV was done as a desperate measure.
 +
 +
2015-346-00:33:57 /IHVDAC DETECTOR=7, VOLTAGE=171 ; ~3300 V
 +
 +
* 2015 December 12: front-slow threshold raised because the previous change on December 10 led to a significant increase of slow rates
 +
 +
2015-346-19:20:04 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
 +
2015-346-19:20:21 /IDPLOAD VALUE=0x20  ; was 0x10
 +
 +
* On January 27 the slow front threshold was changed from 0x20 to 0x10. After the change a huge number of slow counts were observed, so it was decided to restore the previous slow front threshold value  of 0x20.
 +
 +
2016-027-20:14:38 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
 +
2016-027-20:14:47 /IDPLOAD VALUE=0x10  ; was 0x20
 +
 +
2016-027-20:15:35 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
 +
2016-027-20:15:44 /IDPLOAD VALUE=0x20  ; was 0x10
 +
 +
=== Post 2016 Anneal ===
 +
 +
*2016 April 27 (DOY 118) started turning on D1. HV reached 3995 V by April 29, ~03:40
 +
 +
16-119-00:49:49 start ihv_ramp_stage1_g1_g4_g7 (HV = 0x0A, ~200 V)
 +
16-119-02:27:48 start ihv_ramp_stage2_g1_g4_g7 (HV = 0x33, 980 V)
 +
16-119-04:08:00 start ihv_ramp_stage3_g1_g4_g7 (HV = 0x67, 1985 V)
 +
16-120-00:22:16 start ihv_ramp_stage4_g1_g4_g7 (HV = 0x9A, ~3000 V)
 +
16-120-02:01:36 start ihv_ramp_stage5_g1_g4_g7 (HV = 0xB3, ~3500 V)
 +
16-120-03:41:12 start ihv_ramp_stage6_g1_g4_g7 (HV = 0xCE, 3995 V)
 +
 +
*2016 April 29, Front fast and front-slow thresholds were raised to 0x50 and 0x70, respectively.
 +
 +
16-120-00:28:44 /IDPUTABLE7 OFFSET=FRONTFASTDAC
 +
16-120-00:28:58 /IDPLOAD VALUE=0x30
 +
 +
16-120-02:05:44 /IDPUTABLE7 OFFSET=FRONTFASTDAC
 +
16-120-02:06:04 /IDPLOAD VALUE=0x40
 +
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16-120-22:22:59   /IDPUTABLE7 OFFSET=FRONTFASTDAC
 +
16-120-22:23:08   /IDPLOAD VALUE=0x50  ; was 0x40
 +
 +
 +
16-120-03:46:13 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
 +
16-120-03:46:23 /IDPLOAD VALUE=0x40
 +
 +
16-120-03:47:31 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
 +
16-120-03:47:40 /IDPLOAD VALUE=0x60
 +
 +
16-120-23:56:53 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
 +
16-120-23:57:03 /IDPLOAD VALUE=0x70
===D7 front slow LLD threshold history===
===D7 front slow LLD threshold history===
{| class="wikitable"  
{| class="wikitable"  
-
|-
 
-
| 2015-Jan-07 after 14:09 UTC || 0x0C (was 0x10)
 
|-  
|-  
| post 2014 anneal || 0x70
| post 2014 anneal || 0x70
Line 24: Line 129:
|-
|-
| 2014-Dec-4 after 01:09 UTC || 0x10 (was 0x80)
| 2014-Dec-4 after 01:09 UTC || 0x10 (was 0x80)
 +
|-
 +
| 2015-Jan-07 after 14:09 UTC || 0x0C (was 0x10)
 +
|-
 +
| 2015-Jan-14 19:27:36 UTC || 0x10 (was 0x0C)
 +
|-
 +
| 2015-Nov-25 21:24:47 UTC || 0xC0 (was 0x30)
 +
|-
 +
| 2015-Dec-10 21:38:33 UTC || 0x10 (was 0x20)
 +
|-
 +
| 2015-Dec-12 19:20:21 UTC || 0x20 (was 0x10)
 +
|-
 +
| 2016-Jan-27 20:14:47 UTC || 0x10 (was 0x20)
 +
|-
 +
| 2016-Jan-27 20:15:44 UTC || 0x20 (was 0x10)
 +
|-
 +
| post 2016 anneal || 0x70
 +
|-
|}
|}
===D7 front fast LLD threshold history===
===D7 front fast LLD threshold history===
{| class="wikitable"  
{| class="wikitable"  
 +
|-
 +
| post 2014 anneal || 0x2E
|-  
|-  
| 2015-Jan-07 after 14:09 UTC || 0x22 (was 0x2E)
| 2015-Jan-07 after 14:09 UTC || 0x22 (was 0x2E)
 +
|-
 +
| 2015-May-12 21:01:53 || 0x30 (was 0x22)
 +
|-
 +
| 2015-May-12 21:03:20 || 0x40 (was 0x30)
|-  
|-  
-
| post 2014 anneal || 0x2E
+
| 2015-Oct-12 21:50:56 || 0x50 (was 0x40)
 +
|-
 +
| 2015-12-17  20:29:46 || 0x60  (was 0x50)
 +
|-
 +
| post 2016 anneal || 0x50
|-  
|-  
|}
|}
Line 39: Line 171:
|-  
|-  
| post 2014 anneal || 0x30
| post 2014 anneal || 0x30
 +
|-
 +
|post 2016 anneal || 0x30
|}
|}
Line 46: Line 180:
| post 2014 anneal || 0x45
| post 2014 anneal || 0x45
|-  
|-  
 +
| 2015-Jul-13 16:35:15 || 0x50 (was 0x45)
 +
|-
 +
| 2015-Jul-24 17:20:08 || 0x70 (was 0x60)
 +
|-
 +
| 2015-Aug-27 17:58:32 || 0x80 (was 0x70)
 +
|-
 +
| 2015-Sep-17 06:37:46 || 0x90 (was 0x80)
 +
|-
 +
| 2015-Sep-21 20:10:26 || 0xA0 (was 0x90)
 +
|-
 +
| 2015-Oct-08 21:57:39 || 0xB0 (was 0xA0)
 +
|-
 +
| 2015-Oct-09 19:57:41 || 0xC0 (was 0xB0)
 +
|-
 +
| 2015-Oct-12 21:52:03 || 0xD0 (was 0xC0)
 +
|-
 +
| 2015-Nov-06 06:17:16 || 0xF0 (was 0xE0)
 +
|-
 +
| 2015-Nov-07 19:22:41 || 0xFF (was 0xF0)
 +
|-
 +
| ?? || 0x45
|}
|}
Line 52: Line 207:
|-  
|-  
| post 2014 anneal || 4510 V
| post 2014 anneal || 4510 V
 +
|-
 +
| 2015-11-14 07:02:08 UTC || 3897 V (was 4094)
 +
|-
 +
| 2015-11-26 00:27:47 UTC || 3504 V (was 3897)
 +
|-
 +
| 2015-12-12 00:33:57 UTC || 3300 V (was 3504)
 +
|-
 +
| post 2016 anneal || 3995 V
 +
|-
 +
| ?? || 0V
|}
|}

Latest revision as of 15:13, 4 November 2016

This page contains information about changes/issues for RHESSI detector 7 after the 2014 anneal. Detector updates from 2012-mid 2014 can be found here: Detector 7 anneal 2012

Contents

Post 2014 Anneal

After the 2014 anneal, detector 7 was unsegmented. As of 11-27-2014 it has SEGMENTED 

 G7 front slow to 0x80 (was 0x70) after 03:40 on 2014-Aug-14.

 G7 front slow to 0x0C (was 0x10) after 14:21 on 2015-Jan-07.
 G7 front fast to 0x22 (was 0x2E) after 14:22 on 2015-Jan-07.

 15-013-19:27:21 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
 15-013-19:27:36 /IDPULOAD VALUE=0x10 ; increased from 0x0C
 15-013-19:28:17 start idpu_dec_active_vigorous

2015-194-16:35:07 /IDPUTABLE7 OFFSET=REARFASTDAC
2015-194-16:35:15 /IDPLOAD VALUE=0x50 ; was 0x45

2015-205-17:19:59 /IDPUTABLE7 OFFSET=REARFASTDAC
2015-205-17:20:08 /IDPLOAD VALUE=0x70 ; was 0x60

2015-239-17:58:24 /IDPUTABLE7 OFFSET=REARFASTDAC
2015-239-17:58:32 /IDPLOAD VALUE=0x80 ; was 0x70

2015-281-21:57:30 /IDPUTABLE7 OFFSET=REARFASTDAC
2015-281-21:57:39 /IDPLOAD VALUE=0xB0 ; was 0xA0

2015-282-19:56:31 /IDPUTABLE7 OFFSET=REARFASTDAC
2015-282-19:57:41 /IDPLOAD VALUE=0xC0 ; was 0xB0

2015-285-21:51:54 /IDPUTABLE7 OFFSET=REARFASTDAC
2015-285-21:52:03 /IDPLOAD VALUE=0xD0 ; was 0xC0

2015-285-21:50:47 /IDPUTABLE7 OFFSET=FRONTFASTDAC
2015-285-21:50:56 /IDPLOAD VALUE=0x50  ; was 0x40

2015-312-06:17:07 /IDPUTABLE7 OFFSET=REARFASTDAC
2015-312-06:17:16 /IDPLOAD VALUE=0xF0 ; wax 0xE0

2015-313-19:22:31 /IDPUTABLE7 OFFSET=REARFASTDAC
2015-313-19:22:41 /IDPLOAD VALUE=0xFF ; was 0xF0

2015-318-07:02:08 /ihvdac detector=7, voltage=201

2015-329-21:24:47 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
2015-329-21:24:59 /IDPLOAD VALUE=0x30  ; was 0x10

2015-330-00:27:47 /ihvdac detector=7, voltage=181 (3504 V)

2015-344-21:38:17 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
2015-344-21:38:33 /IDPLOAD VALUE=0x10  ; was 0x20

2015-346-00:33:57 /IHVDAC DETECTOR=7, VOLTAGE=171 ; ~3300 V

2015-346-19:20:04 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
2015-346-19:20:21 /IDPLOAD VALUE=0x20  ; was 0x10

2016-027-20:14:38 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
2016-027-20:14:47 /IDPLOAD VALUE=0x10  ; was 0x20

2016-027-20:15:35 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
2016-027-20:15:44 /IDPLOAD VALUE=0x20  ; was 0x10

Post 2016 Anneal 

16-119-00:49:49 start ihv_ramp_stage1_g1_g4_g7 (HV = 0x0A, ~200 V)
16-119-02:27:48 start ihv_ramp_stage2_g1_g4_g7 (HV = 0x33, 980 V)
16-119-04:08:00 start ihv_ramp_stage3_g1_g4_g7 (HV = 0x67, 1985 V)
16-120-00:22:16 start ihv_ramp_stage4_g1_g4_g7 (HV = 0x9A, ~3000 V)
16-120-02:01:36 start ihv_ramp_stage5_g1_g4_g7 (HV = 0xB3, ~3500 V)
16-120-03:41:12 start ihv_ramp_stage6_g1_g4_g7 (HV = 0xCE, 3995 V)

16-120-00:28:44 /IDPUTABLE7 OFFSET=FRONTFASTDAC
16-120-00:28:58 /IDPLOAD VALUE=0x30

16-120-02:05:44 /IDPUTABLE7 OFFSET=FRONTFASTDAC
16-120-02:06:04 /IDPLOAD VALUE=0x40

16-120-22:22:59   /IDPUTABLE7 OFFSET=FRONTFASTDAC
16-120-22:23:08   /IDPLOAD VALUE=0x50  ; was 0x40


16-120-03:46:13 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
16-120-03:46:23 /IDPLOAD VALUE=0x40

16-120-03:47:31 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
16-120-03:47:40 /IDPLOAD VALUE=0x60

16-120-23:56:53 /IDPUTABLE7 OFFSET=FRONTSLOWDAC
16-120-23:57:03 /IDPLOAD VALUE=0x70

D7 front slow LLD threshold history

post 2014 anneal 0x70
2014-Aug-14 after 03:40 UTC 0x80 (was 0x70)
2014-Dec-4 after 01:09 UTC 0x10 (was 0x80)
2015-Jan-07 after 14:09 UTC 0x0C (was 0x10)
2015-Jan-14 19:27:36 UTC 0x10 (was 0x0C)
2015-Nov-25 21:24:47 UTC 0xC0 (was 0x30)
2015-Dec-10 21:38:33 UTC 0x10 (was 0x20)
2015-Dec-12 19:20:21 UTC 0x20 (was 0x10)
2016-Jan-27 20:14:47 UTC 0x10 (was 0x20)
2016-Jan-27 20:15:44 UTC 0x20 (was 0x10)
post 2016 anneal 0x70

D7 front fast LLD threshold history

post 2014 anneal 0x2E
2015-Jan-07 after 14:09 UTC 0x22 (was 0x2E)
2015-May-12 21:01:53 0x30 (was 0x22)
2015-May-12 21:03:20 0x40 (was 0x30)
2015-Oct-12 21:50:56 0x50 (was 0x40)
2015-12-17 20:29:46 0x60 (was 0x50)
post 2016 anneal 0x50

D7 rear slow LLD threshold history

post 2014 anneal 0x30
post 2016 anneal 0x30

D7 rear fast LLD threshold history

post 2014 anneal 0x45
2015-Jul-13 16:35:15 0x50 (was 0x45)
2015-Jul-24 17:20:08 0x70 (was 0x60)
2015-Aug-27 17:58:32 0x80 (was 0x70)
2015-Sep-17 06:37:46 0x90 (was 0x80)
2015-Sep-21 20:10:26 0xA0 (was 0x90)
2015-Oct-08 21:57:39 0xB0 (was 0xA0)
2015-Oct-09 19:57:41 0xC0 (was 0xB0)
2015-Oct-12 21:52:03 0xD0 (was 0xC0)
2015-Nov-06 06:17:16 0xF0 (was 0xE0)
2015-Nov-07 19:22:41 0xFF (was 0xF0)
 ?? 0x45

D7 HV history

post 2014 anneal 4510 V
2015-11-14 07:02:08 UTC 3897 V (was 4094)
2015-11-26 00:27:47 UTC 3504 V (was 3897)
2015-12-12 00:33:57 UTC 3300 V (was 3504)
post 2016 anneal 3995 V
 ?? 0V
Retrieved from "https://sprg.ssl.berkeley.edu/~tohban/wiki/index.php/Detector_7"
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