Detector 9

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This page contains information about changes/issues for RHESSI detector 9 after the 2014 anneal.  Detector updates from 2012-mid 2014 can be found here: [[Detector 9 anneal 2012]]
This page contains information about changes/issues for RHESSI detector 9 after the 2014 anneal.  Detector updates from 2012-mid 2014 can be found here: [[Detector 9 anneal 2012]]
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===Notes===
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===Post 2014 Anneal===
Detector 9 is SEGMENTED after the 2014 anneal!
Detector 9 is SEGMENTED after the 2014 anneal!
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  2015-133-19:09:39 /IDPUTABLE9 OFFSET=FRONTFASTDAC
  2015-133-19:09:39 /IDPUTABLE9 OFFSET=FRONTFASTDAC
  2015-133-19:09:52 /IDPLOAD VALUE=0x40  ; was 0x30
  2015-133-19:09:52 /IDPLOAD VALUE=0x40  ; was 0x30
 +
 +
* On June 11 2015 the front fast threshold was raised because the fast rates were high and the livetime was low.  This action was DID reduce the fast rates but did NOT increase the livetime much!  D9 now does not show high fast rates, slow rates, or resets, but yet the livetime is quite low.
 +
 +
* On August 20 2015 the front fast threshold was raised in an attempt to gain livetime, which was at ~15%.  This was unsuccessful.
 +
15-232-22:21:09 start idib_chg_thrshld (9, FRONT, FAST, 0x90)
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15-232-22:21:38 /IDPUDUMPTABL TABLE=DIBTBL9
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15-232-22:21:38 /IDPUTABLE9 OFFSET=FRONTFASTDAC
 +
15-232-22:21:46 /IDPLOAD VALUE=0x90
 +
 +
* On August 20 2015 the rear segment started dumping a huge number of ULD events into the SSR, filling it.  Once the problem was pinpointed, D9 events were disabled entirely on the 21st.  D9 HV was turned down to 1800V, then 900V, then 800V, in an attempt to bring down the resets.  This brought resets down from 30k to 23k and did, indeed, quiet the ULDs.    The detector remained segmented.  At one point the threshold change to D9 front was reversed to see if that had caused the problem (it hadn't); the threshold change was then re-implemented.  Events were turned briefly back on on Aug. 24 and then off, although no danger signs were seen.  As of Aug. 25, D9 events are still off.  Approximate commanding times are below:
 +
August 21:
 +
1:15 pm PDT:  D9 front fast threshold to 0x60 (was 0x90).
 +
2:50 pm PDT:  D9 front and rear events disabled.
 +
4:30 pm PDT:  HV drop of ~400V, performed in two steps, to 1838V.  No change to resets (30k).  RTS load to keep D9 events from being re-enabled after eclipse.  D9 fast and slow thresholds to max.
 +
6:00 pm PDT:  HV drop to ~900V and then again to ~800V.  Rear resets before and after are 30k then 25.7k then 23.5k.  D9 front fast threshold returned to 0x90.
 +
 +
* On August 24 2015 D9 events were enabled at 20:42:45 UTC in order to check whether we would still dump too many events into the SSR.  The write pointer speed didn't seem to change with this action (although it maybe did change with other detector threshold changes).  We left D9 events on, knowing that they'd be turned off again at the next dawn due to the RTS load.  As of Aug. 26, D9 events are still off.
 +
2015-236-20:42:45 /itmon value=AFE8 (Detector 9 events turn on)
 +
 +
* On Sept 9-11, 2015, the rear D9 ULD rose, finally going crazy and maxing out on Sept 11.  Since events were off, this wasn't noticed until Sept. 28.  To try and avoid/mitigate potential damage to the detector, we lowered the HV on D9 on Sept. 29 PDT (Sept. 30 03:00 UTC) from ~800V to 490V.  We briefly turned on events for G9 as well.  Events were then turned off again at eclipse entry.  The ULD event rate should be checked as soon as we get the monitor rate data on it.  The detector stayed segmented.
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 +
2015-273-03:00:43 /itmon value=AFE8 (Detector 9 events on)
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2015-273-03:01:09 /IHVDAC DETECTOR=9, VOLTAGE=26
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* D9 ULDs went haywire again, so we decided to turn off the HV and electronics for D9.  On Oct 13 Jeremy removed all power from detector 9's HV and turned off DIB (Detector Interface Board) 9.  This commanding was done October 13, 2015 at 18:22 UTC.  It should be monitored to see if we get any noticeable changes to power or temperature diagnostics due to this.
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2015-286-18:21:43 /IHVDAC DETECTOR=9, VOLTAGE=0
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2015-286-18:22:48 start idib_single_off(9)
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 +
===Post 2016 Anneal===
 +
 +
* D9 HV ramped up to 4000 V. The detector was segmented around 1700 V.  We adjusted the rear fast threshold up from 0x45 to 0x60 then turned on events. 
 +
 +
*May 18, 2016 D9 turned off
 +
2016-139-18:53:18 /ihvdac detector=9, voltage=0
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2016-139-18:56:43 /idibpwroff value=9
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* Oct 13, 2016 - ramped up D9 voltage
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16-287-16:17:41 start idib_on_g9
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16-287-16:18:18 start ihv_ramp_stage1_g9
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* On Oct.17 (DOY 291), D9 rear fast threshold was raised from 0x60 to 0x90. In the following passes, it was lowered down to 0x70 and then raised back to 0x80.
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2016-291-17:40:26 /IDPULOAD VALUE=0x90 ; was 0x60
 +
2016-291-19:22:08 /IDPULOAD VALUE=0x70 ; was 0x90
 +
2016-291-20:59:57 /IDPULOAD VALUE=0x80 ; was 0x70
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* On Oct. 19 (DOY 293), D9 rear fast threshold was raised from 0x80 to 0xA0
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2016-293-20:04:33 /IDPULOAD VALUE=0x90
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2016-293-20:06:24 /IDPULOAD VALUE=0xA0
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* Nov 3rd - rear livetime is hovering in low 10s and front is around 50%. Because of lag in SSR and no downlinked monitor rates, difficult to tell what effect this had
 +
2016-308-16:48:47 /IDPUTABLE9 OFFSET=REARFASTDAC
 +
2016-308-16:48:58 /IDPULOAD VALUE=0xD0 ; was 0xB0
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2016-308-16:49:15 /IDPUTABLE9 OFFSET=FRONTFASTDAC
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2016-308-16:49:25 /IDPULOAD VALUE=0x30 ; was 0x22
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* On 30 November 2016 the front fast threshold was increased from 0x30 to 0x40 in an effort to increase the detector livetime.
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2016-335-20:51:41 /IDPUTABLE9 OFFSET=FRONTFASTDAC
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2016-335-20:51:49 /IDPULOAD VALUE=0x40 ; was 0x30
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* On 12 December 2016 the front slow threshold was raised from 0x0C to 0x15 for a better SSR fill level. The front fast threshold was also raised for better lifetimes.
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2016-347-16:53:13 /IDPUTABLE9 OFFSET=FRONTFASTDAC
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2016-347-16:53:23 /IDPULOAD VALUE=0x50 ; was 0x40
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2016-347-16:54:14 /IDPUTABLE9 OFFSET=FRONTSLOWDAC
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2016-347-16:54:19 /IDPULOAD VALUE=0x15 ; was 0x0C
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* Turned off on 2017-01-17
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2017-017-18:36:35 /ihvdac detector=9, voltage=0
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2017-017-18:38:21 start idib_single_off(9)
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===D9 front slow LLD threshold history===
===D9 front slow LLD threshold history===
Line 82: Line 155:
|-
|-
| 2015 Apr 14 14:09:12 || 0x1A (was 0x0C)
| 2015 Apr 14 14:09:12 || 0x1A (was 0x0C)
 +
|-
 +
| post 2016 anneal || 0x0C
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|-
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| 2016-Dec-12 16:54:19 || 0x15 (was 0x0C)
|}
|}
Line 95: Line 172:
| 2015-Jun-11 20:18:44 || 0x50 (was 0x40)
| 2015-Jun-11 20:18:44 || 0x50 (was 0x40)
|-
|-
 +
| 2015-Jul-31 21:42:36 || 0x60 (was 0x50)
 +
|-
 +
| 2015-Aug-20 22:21:46 || 0x90 (was 0x60)
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|-
 +
| 2015-Aug-21 ~20:15 || 0x60 (was 0x90)
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|-
 +
| 2015-Aug-22 ~01:15 || 0x90 (was 0x60)
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|-
 +
| post 2016 anneal || 0x22
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|-
 +
| 2016-Nov-3 16:48:47 || 0x30 (was 0x22)
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|-
 +
| 2016-Nov-30 20:51:49 || 0x40 (was 0x30)
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|-
 +
| 2016-Dec-12 16:53:23 || 0x50 (was 0x40)
 +
|-
 +
| 2016-Dec-17 23:15:43 || 0x80 (was 0x50)
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|-
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| 2016-Dec-18 17:49:16 || 0x90 (was 0x80)
|}
|}
Line 101: Line 197:
|-  
|-  
| post 2014 anneal || 0x30
| post 2014 anneal || 0x30
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|-
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| 2015-Aug-22 ~1:15 UTC || 0xFF
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|-
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| post 2016 anneal || 0x22
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|- ?? || 0x30
|}
|}
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| 2015-Mar-25 21:07:00  || 0xFF (was 0xD0)
| 2015-Mar-25 21:07:00  || 0xFF (was 0xD0)
|-  
|-  
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| post 2016 anneal || 0x60
 +
|-
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| 2016-Oct-17 17:40:26  || 0x90 (was 0x60)
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|-
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| 2016-Oct-17 19:22:08  || 0x70 (was 0x90)
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|-
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| 2016-Oct-17 20:59:57  || 0x80 (was 0x70)
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|-
 +
| 2016-Oct-19 20:04:33  || 0x90 (was 0x80)
 +
|-
 +
| 2016-Oct-19 20:06:24  || 0xA0 (was 0x90)
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|-
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| 2016-Nov-01 21:03:40  || 0xB0 (was 0xA0)
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|-
 +
| 2016-Nov-03 16:48:58 || 0xD0 (was 0xB0)
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|-
 +
| 2016-Nov-28 18:29:52 || 0xE0 (was 0xD0)
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|-
 +
| 2016-Nov-28 21:44:43 || 0xFF (was 0xE0)
|}
|}
Line 142: Line 262:
|-  
|-  
| 2015-Mar-25 || 2622V (was 3603V)
| 2015-Mar-25 || 2622V (was 3603V)
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|-
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| 2015-Aug-03 || 2230V (was 2622V)
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|-
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| 2015-Aug-21 || ~2000V (was 2230V)
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|-
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| 2015-Aug-21 || ~1800V
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|-
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| 2015-Aug-21 || ~900V
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|-
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| 2015-Aug-21 || 808V
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|-
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| 2015-Sep-30 03:01:09 || 490V (was 808V)
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|-
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| 2015-Oct-13 18:22:48 || 0V
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|-
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|| post 2016 anneal || 3995 V
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|-
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|| 2016-May-18 18:53:18 || 0 V
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|-
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|| 2016 - Oct-13 21:10:12 || 3000 V
|-
|-
 +
|| 2017 - Jan-17 18:38:21 || 0 V
|}
|}

Latest revision as of 19:03, 18 January 2017

This page contains information about changes/issues for RHESSI detector 9 after the 2014 anneal. Detector updates from 2012-mid 2014 can be found here: Detector 9 anneal 2012

Contents

Post 2014 Anneal

Detector 9 is SEGMENTED after the 2014 anneal!

 15-008-17:45:50 /IDPUTABLE9 OFFSET=REARFASTDAC
 15-008-17:46:04 /IDPULOAD VALUE=0x50           ;(was 0x45)
 15-021-23:33:58 /idpudumptabl table=dibtbl9
 15-021-23:34:03 /idputable9 offset=rearfastdac
 15-021-23:34:34 /idpuload value=0x58
 15-021-23:36:47 /idputable9 offset=rearfastdac
 15-021-23:36:55 /idpuload value=0x60
 15-057-18:43:13 /IDPUTABLE9 OFFSET=rearfastDAC
 15-057-18:45:14 /IDPLOAD VALUE=0x68
 15-057-20:21:52 /IDPUTABLE9 OFFSET=REARFASTDAC
 15-057-20:22:09 /IDPLOAD VALUE=0x70
 15-064-19:39:50 /IDPUTABLE9 OFFSET=REARFASTDAC
 15-064-19:40:12 /IDPLOAD VALUE=0x80  ; was 0x70
 2015-070-22:46:04 /IDPUTABLE9 OFFSET=REARFASTDAC
 2015-070-22:46:19 /IDPLOAD VALUE=0x90
 15-072-22:06:18 /IDPUTABLE9 OFFSET=REARFASTDAC
 15-072-22:06:31 /IDPLOAD VALUE=0xA0
 15-075-19:24:13 /IDPUTABLE9 OFFSET=REARFASTDAC
 15-075-19:24:28 /IDPLOAD VALUE=0xB0
 15-077-TBD /IDPUTABLE9 OFFSET=REARFASTDAC
 15-077-TBD /IDPLOAD VALUE=0xC0
15-084-21:07:00 /IDPUTABLE9 OFFSET=REARFASTDAC
15-084-21:07:14 /IDPLOAD VALUE=0xFF
15-084-19:26:07 /ihvdac detector=9, voltage=176
15-084-19:27:17 /ihvdac detector=9, voltage=166
15-084-19:28:33 /ihvdac detector=9, voltage=156
15-084-21:05:17 /ihvdac detector=9, voltage=136 (2622 V)
15-097-19:58:06 /IDPUTABLE9 OFFSET=FRONTFASTDAC
15-097-19:58:14 /IDPLOAD VALUE=0x30 ; was 0x22
15-104-14:09:00 /IDPUTABLE9 OFFSET=FRONTSLOWDAC
15-104-14:09:12 /IDPLOAD VALUE=0x1A
2015-133-19:09:39 /IDPUTABLE9 OFFSET=FRONTFASTDAC
2015-133-19:09:52 /IDPLOAD VALUE=0x40  ; was 0x30
15-232-22:21:09 start idib_chg_thrshld (9, FRONT, FAST, 0x90)
15-232-22:21:38 /IDPUDUMPTABL TABLE=DIBTBL9
15-232-22:21:38 /IDPUTABLE9 OFFSET=FRONTFASTDAC
15-232-22:21:46 /IDPLOAD VALUE=0x90
August 21:
1:15 pm PDT:  D9 front fast threshold to 0x60 (was 0x90).
2:50 pm PDT:  D9 front and rear events disabled.
4:30 pm PDT:  HV drop of ~400V, performed in two steps, to 1838V.  No change to resets (30k).  RTS load to keep D9 events from being re-enabled after eclipse.  D9 fast and slow thresholds to max.
6:00 pm PDT:  HV drop to ~900V and then again to ~800V.  Rear resets before and after are 30k then 25.7k then 23.5k.  D9 front fast threshold returned to 0x90.
2015-236-20:42:45 /itmon value=AFE8 (Detector 9 events turn on)
2015-273-03:00:43 /itmon value=AFE8 (Detector 9 events on)
2015-273-03:01:09 /IHVDAC DETECTOR=9, VOLTAGE=26


2015-286-18:21:43 /IHVDAC DETECTOR=9, VOLTAGE=0
2015-286-18:22:48 start idib_single_off(9)

Post 2016 Anneal

2016-139-18:53:18 /ihvdac detector=9, voltage=0
2016-139-18:56:43 /idibpwroff value=9
16-287-16:17:41 start idib_on_g9
16-287-16:18:18 start ihv_ramp_stage1_g9
2016-291-17:40:26 /IDPULOAD VALUE=0x90 ; was 0x60
2016-291-19:22:08 /IDPULOAD VALUE=0x70 ; was 0x90
2016-291-20:59:57 /IDPULOAD VALUE=0x80 ; was 0x70
2016-293-20:04:33 /IDPULOAD VALUE=0x90
2016-293-20:06:24 /IDPULOAD VALUE=0xA0
2016-308-16:48:47 /IDPUTABLE9 OFFSET=REARFASTDAC 
2016-308-16:48:58 /IDPULOAD VALUE=0xD0 ; was 0xB0
2016-308-16:49:15 /IDPUTABLE9 OFFSET=FRONTFASTDAC
2016-308-16:49:25 /IDPULOAD VALUE=0x30 ; was 0x22
2016-335-20:51:41 /IDPUTABLE9 OFFSET=FRONTFASTDAC
2016-335-20:51:49 /IDPULOAD VALUE=0x40 ; was 0x30
2016-347-16:53:13 /IDPUTABLE9 OFFSET=FRONTFASTDAC
2016-347-16:53:23 /IDPULOAD VALUE=0x50 ; was 0x40
2016-347-16:54:14 /IDPUTABLE9 OFFSET=FRONTSLOWDAC
2016-347-16:54:19 /IDPULOAD VALUE=0x15 ; was 0x0C
2017-017-18:36:35 /ihvdac detector=9, voltage=0
2017-017-18:38:21 start idib_single_off(9)


D9 front slow LLD threshold history

post 2014 anneal 0x0C
2015 Apr 14 14:09:12 0x1A (was 0x0C)
post 2016 anneal 0x0C
2016-Dec-12 16:54:19 0x15 (was 0x0C)

D9 front fast LLD threshold history

post 2014 anneal 0x22
2015-Apr-07 19:58 0x30 (was 0x22)
2015-May-13 19:09:52 0x40 (was 0x30)
2015-Jun-11 20:18:44 0x50 (was 0x40)
2015-Jul-31 21:42:36 0x60 (was 0x50)
2015-Aug-20 22:21:46 0x90 (was 0x60)
2015-Aug-21 ~20:15 0x60 (was 0x90)
2015-Aug-22 ~01:15 0x90 (was 0x60)
post 2016 anneal 0x22
2016-Nov-3 16:48:47 0x30 (was 0x22)
2016-Nov-30 20:51:49 0x40 (was 0x30)
2016-Dec-12 16:53:23 0x50 (was 0x40)
2016-Dec-17 23:15:43 0x80 (was 0x50)
2016-Dec-18 17:49:16 0x90 (was 0x80)

D9 rear slow LLD threshold history

post 2014 anneal 0x30
2015-Aug-22 ~1:15 UTC 0xFF
post 2016 anneal 0x22

D9 rear fast LLD threshold history

post 2014 anneal 0x45
2015-Jan-08 17:46:04 0x50 (was 0x45)
2015-Jan-22 23:34:34 0x58 (was 0x50)
2015-Jan-22 23:36:55 0x60 (was 0x58)
2015-Feb-27 18:45:14 0x68 (was 0x60)
2015-Feb-27 20:22:09 0x70 (was 0x68)
2015-Mar-05 19:40:12 0x80 (was 0x70)
2015-Mar-11 22:46:19 0x90 (was 0x80)
2015-Mar-13 22:06:31 0xA0 (was 0x90)
2015-Mar-16 19:24:28 0xB0 (was 0xA0)
2015-Mar-18 21:52:57 0xC0 (was 0xB0)
2015-Mar-18 23:32:15 0xD0 (was 0xC0)
2015-Mar-25 21:07:00 0xFF (was 0xD0)
post 2016 anneal 0x60
2016-Oct-17 17:40:26 0x90 (was 0x60)
2016-Oct-17 19:22:08 0x70 (was 0x90)
2016-Oct-17 20:59:57 0x80 (was 0x70)
2016-Oct-19 20:04:33 0x90 (was 0x80)
2016-Oct-19 20:06:24 0xA0 (was 0x90)
2016-Nov-01 21:03:40 0xB0 (was 0xA0)
2016-Nov-03 16:48:58 0xD0 (was 0xB0)
2016-Nov-28 18:29:52 0xE0 (was 0xD0)
2016-Nov-28 21:44:43 0xFF (was 0xE0)

D9 HV history

post 2014 anneal 3995 V
2014-Aug-20 3603V (was 3995V)
2015-Mar-25 2622V (was 3603V)
2015-Aug-03 2230V (was 2622V)
2015-Aug-21 ~2000V (was 2230V)
2015-Aug-21 ~1800V
2015-Aug-21 ~900V
2015-Aug-21 808V
2015-Sep-30 03:01:09 490V (was 808V)
2015-Oct-13 18:22:48 0V
post 2016 anneal 3995 V
2016-May-18 18:53:18 0 V
2016 - Oct-13 21:10:12 3000 V
2017 - Jan-17 18:38:21 0 V
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